It was almost a year ago when we first heard details about AMD’s plans for its top-dog mobile part for Zen 5, which goes by the name Strix Halo. For Zen 5 in laptops, AMD is developing two lines of chips: Strix Point for mainstream and Strix Halo to tower over the entire lineup by offering more of everything. Now it appears this chip will indeed be a big one, as newly unearthed details show it will use a BGA package that is 70% larger than the one required by existing Phoenix and Strix mobile CPUs.
Details about this upcoming Strix Halo chip have been collected from various sources, with more information found in shipping manifests aligning with online leaks, such as a schematic from the Chiphell forums, making them seem like they could be real. The most eye-opening number included in these leaks is that it will use a new BGA socket named FP11 with 2,077 pins. As HotHardware notes, its previous and current standard mobile chips have all used a socket named FP8, so this is a whole new ball of wax that is seemingly much larger. It’s even bigger than the FL1 socket AMD currently uses for its Dragon Range CPUs, which are desktop-class chips shoehorned into a BGA socket for desktop-replacement laptops.
This flagship mobile part will use two different TSMC 4nm nodes; N4X for the Zen 5 cores and N4P for the SoC, allegedly.
Credit: AMD
The overall size of this socket is being tipped as measuring 37.5mm by 45mm, which compares with FP8’s 25mm by 40mm. The larger socket could be necessitated by the rumored 256-bit memory bus on Strix Halo. It is also rumored to support up to 64GB of DDR5-8000 memory, putting it in the realm of desktop machines in memory bandwidth. This chip is rumored to offer a beefy RDNA 3+ GPU with 40 compute units, making it theoretically more potent than a Radeon RX 7600 desktop GPU. AMD wants to take on Apple’s M-series chips and Intel’s upcoming Battlemage GPUs.
Other desktop-class specs that would necessitate such a large socket include a dual-chiplet design that mirrors that of its flagship desktop CPUs. It’s rumored to offer two eight-core CCDs for a total of 16 cores and 32 threads. It will also feature a sizable SOC die with an XDNA 2 neural processing unit (NPU) capable of up to 45-50 TOPS, so it could be used on AI PCs. Its TDP is rumored to be around 120W, roughly double that of regular Strix CPUs, indicating it’s essentially a desktop chip in a mobile package.